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[2018-6-27] Design and Analysis for Real-Time Mixed-Criticality Scheduling
Date:2019-12-23
Title: Design and Analysis for Real-Time Mixed-Criticality Scheduling
Time: 10:00 am, June 27th, 2018
Venue: Room 334, Building 5, State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences
Abstract:
Real-time mixed-criticality systems have stringent timing requirements in the form of hard deadlines and a collection of tasks having different levels of importance or criticality hosted on a single hardware platform. Avionics and automotive are two well known domains for such systems, where the criticality level has a strong correlation with the assurance levels used for certification. Traditionally, static processor partitioning, in the form of fixed allocation of processing time, has been employed to ensure isolation between the different criticality tasks and guarantee task deadlines. However, due to increasing software and hardware complexity, pessimistic upper-bounds are often used for the worst-case execution time estimates of critical tasks, and this leads to significant processor under-utilisation. To overcome this inefficiency, the concept of mixed-criticality scheduling has emerged in the last decade. Under this paradigm, processing capacity is partitioned among all the tasks using a less conservative execution time estimate. In the eventuality that some critical task requires additional execution budget, the schedule is adapted to favour the critical tasks over less critical ones.
Focusing on mixed-criticality scheduling issues, in this talk I will present some recent results. Considering a single-core processor, I will present a new scheduling model and runtime budget enforcement policy to dynamically manage the budget allocations for critical tasks so that: 1) all tasks continue to receive as much budget as they need for as long as feasible, and 2) less critical tasks continue to receive some guaranteed budget even after the schedule is adapted to favour the critical tasks. Then, considering a multi-core processor, I will present a new fluid scheduling model that significantly improves the schedulability performance when compared to state-of-the-art approaches, while still having a theoretically bounded performance guarantee. I will conclude the talk highlighting some of the open problems in this area.
Biography:
Arvind Easwaran is an Assistant Professor in the School of Computer Science and Engineering (SCSE) and Cluster Director for the Future Mobility Solutions (Autonomous Vehicles) program at the Energy Research Institute (ERI@N) in Nanyang Technological University (NTU), Singapore. He received a PhD degree in Information and Computer Science from the University of Pennsylvania, USA, in 2008. Prior to joining NTU in 2013, he has been a Scientist at the Polytechnic Institute of Porto, Portugal and at Honeywell Aerospace, USA. He has been selected as a Distinguished Speaker by the Association for Computing Machinery (ACM) for the period 2018-2020. He is currently leading research projects on topics related to cyber-physical systems including resilient cyber-infrastructure and model-in-the-loop framework for smart manufacturing, assured autonomy for safety-critical applications and decentralised algorithm design for smart electricity meters. His research interests are in the design and analysis of cyber-physical and real-time systems.